OS Processors

Luis C. Busquets Pérez (EC-CONNECT, European Commission)

Luis C. Busquets Pérez holds a degree in telecommunications engineering (UPC, Barcelona) and a Master in Business Administration (ESADE, Barcelona). For more than 20 years, his professional career has been developed in the ICT sector covering all OSI layers (from fibre optics and semiconductors to IT applications). Previous to his career in the European institutions, he held several positions in marketing and sales in ICT Fortune 500 companies. In 2006, he joined the European Commission services and is currently Programme Officer in DG CONNECT E2, which is the Cloud and Software unit.  

John Davis (BSC)

John D. Davis is the Director of the Laboratory for Open Computer Architecture at Barcelona Supercomputing Center. He has published over 30-refereed conference and journal papers. He holds over 35 issued or pending patents in the USA and Europe. He has held several technical and executive roles in large company and start-up environments, leading the entire product strategy, roadmap, and execution. At BSC, John is the technical lead for multiple projects. John is the founder and chair of the RISC-V Special Interest Group on High-Performance Computing (SIG-HPC). 

Roger Espasa (Semidynamics)

Roger Espasa is the founder and CEO of Semidynamics, an IP supplier of two RISC-V cores, Avispado (in-order) and Atrevido (out-of-order) supporting the RISC-V vector extension and GazzillionTM misses, both targeted at HPC and Machine Learning. In addition, Semidynamics architected and designed the Esperanto Technologies' 1024+ core machine-learning 7nm SoC. Prior to Semidynamics, Roger was at Broadcom working on an ARMV8 wide out-of-order core.  (2014-2016). Previously, Roger worked at Intel (2002-2014) developing a vector extension for the x86 ISA, initially deployed in XeonPhi (Larrabee) which then became AVX-512. Roger also led the texture sampling unit for Larrabee. Roger then worked on Knight's Landing (14nm) and led the core for Knights Hill (10nm). Between 1999 and 2001 Roger worked for the Alpha Microprocessor Group on a vector extension to the Alpha architecture known as Tarantula. Roger got his PhD from UPC in 1997, has published over 40 peer-reviewed papers on Vector Architectures, Graphics/3D Architecture, Binary translation and optimization, Branch Prediction, and Media ISA Extensions and holds 9 patents with 41 international filings. 

Andrea Acquaviva (University of Bologna)

Andrea ACQUAVIVA (PhD) received the Ph.D. degree in Electrical Engineering in 2003 and in Complex Systems for Life Science in 2018. He was research intern at HP Labs Palo Alto, CA, USA and visiting researcher at LSI lab, EPFL, CH. He has been coordinator of various European and National projects in the field of IoT and edge/cloud computing focusing on smart city/energy/buildings applications. 
Main research interests span: i) Resource optimization for heterogenous platforms and multicores; ii) Neuromorphic computing. Researches by Prof. Andrea Acquaviva (between 2000 and 2022) yielded more than 300 papers in international journals and peer-reviewed conference proceedings. 

Olof Kindgren (Qamcom Technology AB and FOSSi Foundation)

Olof Kindgren is a digital design engineer working for Qamcom. He is actively involved in many FOSSi (Free and Open Source Silicon) projects since 2010, especially focusing on tools for collaborations. Notable work include Edalize; the award-winning FuseSoC IP core package manager; the award-winning SERV RISC-V CPU and SweRVolf, a reference platform for the SweRV RISC-V CPU family. In 2015, he co-founded FOSSi Foundation, a vendor-independent organization aiming to promote and assist Open Source Silicon in academia, the industry and for hobbyists alike. He also works on the free RVFPGA computer architecture course, CHIPS Alliance and as a RISC-V ambassador.

Patrick Pype (NXP and  RISC-V Open Source Working Group)

Patrick is Director of Strategic Partnerships at NXP Semiconductors, and has held this position since 2012. He began his career at IMEC in Belgium in 1986.  In 1996 he started the start-up company CoWare on hardware/software co-design which was later acquired by Synopsys.  Thereafter he worked at Philips in different positions. Patrick is Chairman of the AENEAS Technical Expert Group since 2018 and he is member of the INSIDE Steering Board since 2015.  He was co-chair of the overall ECSEL Strategic Research Agenda 2019-2021 and is also co-chair of the chapter on “Transport & Mobility”.  Patrick was Chairman of the Engineering Alumni Association of the KULeuven from 2005-2008.  He recently was chair of a European Working Group on RISC-V and OpenSource. Patrick has contributed several papers in two books published by Springer on “Automated Driving’’ and “Internet of Vehicles’’.  He is author of the book “Zest for Opera – Unleash your Leadership”, which was published in October 2018.  The book offers inspiring insights from the world of opera for leaders in business & politics, coaches, teachers and students. 

Craig Prunty (SiPearl VP Marketing & Business Development)

Craig joined SiPearl in May 2020 as VP Marketing and Business Development. Before working at SiPearl, Craig was Marketing Director for Marvell Semiconductor’s Server Processor Business Unit in Santa Clara, California. His 20+ years in the Semiconductor industry include sales, marketing, and technical roles with Cavium, AppliedMicro (AMCC), Lockheed-Martin, and Unisys. He lives in Paris, France with dual French and US citizenship. Craig holds a B.S. in Mathematics from Lewis & Clark College in Portland, Oregon, and an MS in Electrical Engineering from San Diego State University.